Samsung Started Mass Production of 3nm Chips Before TSMC

Samsung Started Mass Production of 3nm Chips Before TSMC

Samsung beat Taiwanese global chip maker TSMC in the race to build the world’s most advanced chips: 3nm chips. According to a Bloomberg report, the new chip, which is a milestone for Samsung, is expected to be more powerful and efficient than its 5nm predecessors. TSMC’s 3nm process is not expected to enter mass production until the second half of 2022.


After TSMC’s dominance of the contract chip manufacturing market, pushing Samsung to be the first to bring the latest technology to market is essential in a bid to overtake TSMC as the world’s largest chip maker by 2030. TSMC has been Apple’s chip maker for iPhone, iPod, and MacBooks. However, according to a Bloomberg report, Samsung likely won’t be able to capture TSMC’s market share until the new 3nm process proves successful, it is profitable and can adequately compete with the market leader.

“We will continue to actively innovate in developing competitive technology and establish processes that help accelerate technology maturity,” said Seung Choi, President, and Head of Plumbing Business Division, Samsung. Samsung hopes to attract new customers such as Apple, Qualcomm, and other major chip designers with its new technology.

Mass production of Samsung’s 3nm chips will begin at its Hwaseong facility and is expected to move to its newest plant in Pyeongtaek. 3nm semiconductors will specialize in high-performance, low-power computing applications before eventually expanding to the mobile processor. As a result of recent global chip shortages, chip manufacturing sites have come under intense scrutiny, with the United States, Europe, and China vying for manufacturers to produce more chips locally.


In the company’s statement, by applying Gate-All-Around transistor architecture, Samsung’s 3nm products will be 45% more energy-efficient than 5nm products, 23% higher performance, and 16% smaller surface area. In the future, the 3nm second-generation process is expected to reduce power consumption by 50%, size by 35%, and increase performance by 30%, respectively.

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